发明名称 Testability architecture for modularized integrated circuits
摘要 A testability architecture and method for loosely integrated (modularized) integrated circuits uses stand alone module testing. For an integrated circuit chip which has a number of independent modules, where one module design is used in a number of different chips, each module is connected to the chip's input/output pins and to a configuration module. To make testing of the modules more efficient and less expensive, during testing of the chip a particular module design is confronted with the same testing environment regardless of the actual chip in which it is present. Advantageously, chip area is only slightly enlarged by the test circuitry. A test architecture of the configuration module includes test registers and carries out a standard protocol for all read and write transactions during testing. This approach provides better test coverage and economizes in test generation.
申请公布号 US6493840(B1) 申请公布日期 2002.12.10
申请号 US19990433611 申请日期 1999.11.02
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 SHACHAM ALON;LIOR PELEG;SABAN RAMI;SIDL YOMTOV
分类号 G01R31/28;G01R31/3185;(IPC1-7):G01R31/28;G01R31/08 主分类号 G01R31/28
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