| 摘要 |
The charge pump device includes, in a cascade arrangement, a plurality of stages (1 to N) for transferring a potential charge from one stage to the next in response to clock signals (PHI, PA, PHINOT, PB), each stage including, arranged between an input (Ai) and an output (Ai+1), a switching circuit (100, 200) and a storage capacitor (Ca; Cb). Each switching circuit is formed of a first transistor (110; 130) and a second transistor (120; 140), the drains of the first and second transistors being connected to the input (Ai) of the stage, the source of the first transistor (110; 130) being connected to the gate of the second transistor (120; 140) and the source of the second transistor being connected to output (Ai+1) of the stage and to the gate of the first transistor. At each of the stages (1 to N) there are provided starting-up means (300; 400; 500) for keeping said second transistor (120, 140) in a non conducting state between two activation cycles of said charge pump device.
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