| 摘要 |
PROBLEM TO BE SOLVED: To provide a flip-flop circuit with a simple circuit configuration and a low power consumption that obtains a stable output. SOLUTION: The flip-flop circuit is provided with a 1st comparator 11 that compares a reference signal VREF with an input signal VIN and outputs a 1st output signal VA in response to the result of comparison, a delay circuit 13 that delays the 1st output signal VA for a prescribed time, a 2nd comparator 12 that compares the 1st output signal VA delayed by a prescribed time with the reference signal VREF and outputting a 2nd output signal VB with a level in response to the comparison result, an OR gate 14 that uses the 1st output signal VA and the 2nd output signal VB to generate a gate signal VG and provide an output, and an SR latch 15 that latches an output signal VOUT when receiving the gate signal VG.
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