| 摘要 |
PROBLEM TO BE SOLVED: To provide a high-frequency signal transmitter/receiver which can synchronize data, even if the clock signal frequency is lowered in the case of sampling data in an analog/digital converting part(A/D) 15. SOLUTION: In the device, having a signal transmitting part 1 and a signal receiving part 2 for transmitting/receiving an information packet having a header part, preamble and data, the signal reception part 2 is provided with an A/D 15 for applying A/D conversion to a received signal, a clock signal generating part 16 for selecting one of first and second clock signals, having different cycles and supplying it to the A/D 15 as a sampling pulse and a clock signal control part 17 for controlling the timing for generating the first and second clock signals. When the preamble and the data are to be sampled the preamble is sampled by the first clock signal, the data are sampled by the second clock signal and the cycle of the first clock signal is selected three-times or higher than the cycle of preamble. |
