SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor memory in which data stored in a memory for storing data can be initialized at high speed at system reset or in applying power suppressing increment of area on layout. SOLUTION: An address counter circuit 26 generates an internal address for selecting a memory cell successively with the prescribed period in an activation period of a reset signal in accordance with a reset signal externally given. World line driving circuits 18a-18d select a memory cell by activating a word line in accordance with an internal address signal. An inverter 15 for adjusting a bit line potential level is provided in common for a plurality of pairs of bit line, and sets a potential level of bit line of one side and a potential level of a bit line of the other side out of each pair of bit line to a complementary level in an activation period of a reset signal.