发明名称 MIS FIELD EFFECT TRANSISTOR AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a MIS field effect transistor having a gate electrode of a low-melting point metal and metal source/drawn region and its manufacturing method. SOLUTION: MIS field transistor in which a trench element isolation region 3 is formed by burying an oxide film both on a p type silicon substrate 1 and inside and a gate electrode 9 having a barrier metal 8 at both sides and bottom face is formed on the p type silicon substrate via a gate oxide film 6 and a barrier metal 7. A spacer 10 is formed at sidewall of the gate electrode and the trench element isolation region. n type and n<+> type source/drain region (4, 5) is formed self-aligned with the gate electrode and the spacer. A source/ drain region 12 having a barrier metal 11 on both the sidewall and a bottom face is formed on the n<+> source/drain regions between spacers. A convex protrusion 14 formed on the gate electrode and a part of metal source/drain region is planarized by a thin insulation film 13. A conductive plug 15 having a barrier metal at sidewall is formed directly on the convex protrusion and the conductive plug is buried flatly by a interlayer insulation film 17 and a wiring body 19 is connected to the conductive plug.
申请公布号 JP2002353244(A) 申请公布日期 2002.12.06
申请号 JP20010161732 申请日期 2001.05.30
申请人 SHIRATO TAKEHIDE 发明人 SHIRATO TAKEHIDE
分类号 H01L21/28;H01L21/3205;H01L21/336;H01L21/8238;H01L23/52;H01L27/08;H01L27/092;H01L29/423;H01L29/43;H01L29/49;H01L29/78;H01L29/786;(IPC1-7):H01L21/336;H01L21/320;H01L21/823 主分类号 H01L21/28
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