发明名称 DEVICE AND METHOD FOR GENERATING STM FRAME IN SDH APPARATUS
摘要 PURPOSE: A device and a method for generating an STM(Synchronous Transfer Mode) frame in an SDH(Synchronous Digital Hierarchy) apparatus are provided to generate an STM1 frame using a certain gate in an AU3(Administrative Unit 3) frame generator without a specific composition. CONSTITUTION: An MSOH/RSOH(Multiplex Section OverHead/Regeneration Section OverHead) inserting unit(221) inserts a corresponding fixed value and variable value among each composition byte values of the MSOH and the RSOH into a corresponding time slot of a front overhead portion of a primary AU3 frame of an AUG(Administrative Unit Group) generated from the first AU3 frame generating unit. A multiplexer(222) receives an output frame of the MSOH/RSOH inserting unit(221) and a frame inputted from the outside, and multiplexes the output frame of the MSOH/RSOH inserting unit(221) and the frame inputted from the outside according to a designated time slot signal. A B1 byte calculating/inserting unit(223) calculates the first bit interleaved parity byte, i.e., B1 byte on the basis of the last output frame through a scrambler(226), and inserts the calculated B1 byte value into a corresponding time slot of the output frame of the multiplexing unit(222) according to the designated time slot signal. An M1/B2 byte inserting unit(224) adds a multiple section remote error indication byte, i.e., M1 byte and a previous M1 byte to newly determine an M1 value, newly determines the second bit interleaved parity byte, i.e., B2 byte on the basis of the determined M1 value, and inserts the determined M1 and B2 byte values into the designated time slot of the output frame of the B1 byte calculating/inserting unit(223). A flip-flop(225) successively outputs the data of the output frame of the M1/B2 byte inserting unit(224) according to a set clock signal. A scrambler(226) scrambles the output signal of the flip-flop(225), and outputs the scrambled signal as the last output frame.
申请公布号 KR20020091636(A) 申请公布日期 2002.12.06
申请号 KR20010030469 申请日期 2001.05.31
申请人 ESTEL SYSTEMS CORPORATION 发明人 JUNG, JI UN;KIM, JONG CHEOL
分类号 H04L12/43;(IPC1-7):H04L12/43 主分类号 H04L12/43
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