发明名称 |
Reducing latency and power in asynchronous data transfers |
摘要 |
Reducing latency and power in the transfer of data between a source and destination domain involves the production of a source-enable signal base on a synchronous-pulse signal. The source-enable signal operates to enable a source register to capture data from a source domain. The source-enable signal may be controlled by a source-inhibit signal. The source-inhibit signal prevents the synchronous-pulse signal from producing the source enable signal and capture clock until data is available for transmission.
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申请公布号 |
US2002181631(A1) |
申请公布日期 |
2002.12.05 |
申请号 |
US20010872277 |
申请日期 |
2001.05.31 |
申请人 |
MACKEY RICHARD P.;SMITH DAVID R.;MCCOSKEY JEFFREY J. |
发明人 |
MACKEY RICHARD P.;SMITH DAVID R.;MCCOSKEY JEFFREY J. |
分类号 |
G06F1/32;H04L7/00;(IPC1-7):H04L7/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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