发明名称 Method of manufacturing semiconductor device
摘要 A layer comprising a second metal silicide as a major constituent element or a layer comprising a second metal as a major constituent element is formed simultaneously by one single chemical vapor deposition process to the bottom surface of two out of there groups of openings etched in a dielectric film on a substrate. A surface comprising silicon as a major constituent element is exposed at each bottom ("through holes or local interconnection holes") of the first group of openings, a surface comprising a first metal silicide as a major constituent element is exposed at each bottom of the second group of openings, and a surface comprising a first metal as a major constituent element is exposed at each bottom of the third group of openings. The manufacturing method provides low contact resistance and sufficiently small junction leakage current from a diffusion layer in connection with plugs or local interconnections, even if the etched area of the openings are of different depths, shapes, or sizes.
申请公布号 US2002182847(A1) 申请公布日期 2002.12.05
申请号 US20020197411 申请日期 2002.07.18
申请人 HITACHI, LTD. AND HITACHI ULSI SYSTEMS CO., LTD. 发明人 YOKOYAMA NATSUKI;KAWANO MASAKAZU
分类号 H01L21/28;H01L21/285;H01L21/3205;H01L21/336;H01L21/768;H01L21/8238;H01L21/8242;H01L23/52;H01L23/522;H01L27/092;H01L27/10;H01L27/108;H01L29/78;(IPC1-7):H01L21/476 主分类号 H01L21/28
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