发明名称 Lead-bond type chip package and manufacturing method thereof
摘要 A lead-bond type chip package includes a multilayer substrate for supporting and electrical interconnecting a semiconductor chip. The multilayer substrate has a slot defined therein. The multilayer substrate comprises an interlayer circuit board having prepregs disposed thereon, a plurality of leads on the prepreg on the upper surface of the interlayer circuit board, and a plurality of solder pads for making external electrical connection on the prepreg on the lower surface of the interlayer circuit board. The leads of the multilayer substrate are bonded to corresponding bonding pads formed on the semiconductor chip. A package body is formed on the multilayer substrate around the semiconductor chip and in the slot of the multilayer substrate. The multilayer substrate is capable of providing a power or ground plane formed therein for enhancing the electrical performance of the package, and providing a high wiring density for packaging a chip with high I/O connections. This invention also provides a method of producing a multilayer substrate for use in forming a lead-bond type chip package
申请公布号 US2002182770(A1) 申请公布日期 2002.12.05
申请号 US20020195375 申请日期 2002.07.16
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 CHEN KUN-CHING;YEH YUNG I.
分类号 H01L21/48;H01L23/06;H01L23/12;H01L23/13;H05K3/40;H05K3/46;(IPC1-7):H01L21/48 主分类号 H01L21/48
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