发明名称 Method for modeling semiconductor device process
摘要 There is disclosed a method for using a computer to calculate a pileup state of an impurity in an interface between an Si layer in which a source and a drain are formed, and an SiO2 layer brought in contact with the Si layer at a high speed. First, data is set assuming that the Si layer is constituted of a plurality of cells. Subsequently, the impurity is moved to a pileup position of the interface from each cell, and an amount of impurity piled up in each pileup position of the interface is calculated. In this case, a mass of the impurity moving to the interface from each cell is determined as a function of a distance to each pileup position from each cell, and a distance to a source or a drain closest to the cell.
申请公布号 US2002183991(A1) 申请公布日期 2002.12.05
申请号 US20020059176 申请日期 2002.01.31
申请人 HAYASHI HIROKAZU 发明人 HAYASHI HIROKAZU
分类号 H01L29/00;G06F17/50;H01L21/336;H01L29/78;(IPC1-7):G06F17/10 主分类号 H01L29/00
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