发明名称 |
Semiconductor device and method of manufacturing the same |
摘要 |
A lower metal layer is provided on a lower interlayer insulating film in an MIM capacitance element forming region. The lower metal layer is formed by the same step as that in which the lower interconnection layer is formed. A dielectric layer and an upper metal layer patterned using the same mask are provided on the lower metal layer. The upper metal layer is formed to have a thickness that is thinner than the thickness of the lower metal layer. Thus, it becomes possible to achieve high reliability (lifetime) of the MIM capacitance element by improving the structure of the MIM capacitance element as well as the manufacturing steps.
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申请公布号 |
US2002179951(A1) |
申请公布日期 |
2002.12.05 |
申请号 |
US20010986578 |
申请日期 |
2001.11.09 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
YOSHIYAMA KENJI;MORITA KIYOAKI |
分类号 |
H01L27/04;H01L21/02;H01L21/768;H01L21/822;H01L23/522;H01L27/08;(IPC1-7):H01L27/108;H01L29/76;H01L29/94;H01L31/119 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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