| 摘要 |
Buffered current-feedback power supply (40) device useful for a number of devices. The power supply (40) includes first, third and fourth PMOS transistors (48, 54), a voltage supply (42, 44), and an output terminal B. The first and second transistors (46, 48) are connected in series at a first point of connection A. The voltage supply (42) is also connected to the drain of the third transistor (50), whose gate is tied to the point A. The first and third transistors (46, 50) are current sources for the power supply (40). With its gate tied to point A, the third transistor (50) is also an error amplifier for the negative feedback from the current feedback loop. The fourth transistor (52) is connected as a buffer or source follower amplifier for the third transistor (50), at a second connection point B. The gate of the fourth transistor (52) is a control input. The fifth transistor (54) is connected to a second and fourth transistors (48, 52) at a third point of connection C, to complete the power supply. Separate bias voltage may be provided at the gate of the first, second and fifth transistors (46, 48, 54).
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