System to set burst mode in a device

摘要

System to set burst mode in a memory device. The system includes apparatus having a first signal buffer that receives an address control signal and produces a buffered address control signal. A mode detection circuit is included that receives the buffered address control signal and produces a burst control signal. The apparatus also includes a core access trigger circuit that receives the burst control signal and generates a core access signal that is used to begin a core access for burst mode operation of the memory.