DISPOSITIVO DI MEMORIA NON VOLATILE E RELATIVO PROCESSO DIFABBRICAZIONE

摘要

A non-volatile memory device including memory cells each formed as a MOS transistor having source and drain regions and gate structures is described. The source and drain regions and the gate structures are covered by a silicon nitride layer obtained in a standard PECVD chamber at a temperature lower than 480 � C. and with a suitable gas flow. An insulated layer is placed over the silicon nitride layer.