| 摘要 |
PROBLEM TO BE SOLVED: To provide a RAM test circuit being suitable for a marching test. SOLUTION: Read-out data from a RAM 3 is take into a register 4 by synchronizing with rise of a next clock CLK. A data bus DB is connected to a comparator, 5 when data read out to the data bus DB from the RAM 3 and is different from data stored in the register 4 synchronizing with variation for a high level of a read-strobe signal RS, '1≈ indicating that a compared result is uncoincidence is taken into a flip-flop 7, and a coincidence detecting signal ID is changed to a high level. Thus, as this circuit has such constitution that read-out data is compared with read-out data of preceding address, a marching test for detecting uncoincidence of both data as defect can be preformed efficiently by writing previously the same data in all bits. |
