发明名称 FIELD EFFECT TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To suppress the degradation of characteristics of a field effect transistor formed in a semiconductor layer (SOI) on a buried insulation layer. SOLUTION: A semiconductor layer 103 formed of single crystalline silicon which has a thickness of 10 nm is formed on a silicon substrate 101 via a cavity 102 having a thickness of 20 nm. On the semiconductor layer 103, a gate electrode 105 formed of n<+> polysilicon is formed via a gate insulation film 104 having a thickness of 3 nm. Source and drain regions 106 are so provided that a region below the gate electrode 105 is interposed between the source and drain regions.
申请公布号 JP2002343977(A) 申请公布日期 2002.11.29
申请号 JP20020085523 申请日期 2002.03.26
申请人 NEC CORP 发明人 KO RISHO
分类号 H01L21/764;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L21/764
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