| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that, in the prior art, on the occasion that a PLL used for detecting a synchronizing signal is needed to have a wide pull-in range or when many quasi-lock points appear by the influence of the quantizing error resulting from digitizing, all of the quasi-lock points due to the quantizing error must be clarified to detect the quasi-lock for all the points. SOLUTION: While a PLL is in a quasi-lock state, the output of a phase error detector circuit is not 0 but 0 in average. To detect this state, a constitution is provided for converting the phase error output into an absolute value thereof and filtering it with an LPF the output of which is monitored to detect the quasi-lock state. Thus, even a PLL composed of digital circuits or having a wide pull-in range, the quasi-lock state can reliably detected. |
