| 摘要 |
PROBLEM TO BE SOLVED: To provide a microprocessor capable of reducing re-fetch at branching in simple constitution and accelerating a processing speed. SOLUTION: By adding a new branching instruction (BJMP) and processing instructions to the one before a branching destination specified by the branching instruction (BJMP) as the operand of the branching instruction (BJMP), the number of the instructions to be processed is varied. The instruction word length of the branching instruction including the instruction processed as the operand is outputted to a program counter 8, the address of the program counter 8 is updated and a queue buffer 2 is not flashed at the branching instruction (BJMP).
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