发明名称 TIMING CONTROL METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a device, constituted of a microcomputer and a slave device connected to the bus of the microcomputer capable of flexibly facilitating countermeasures, even for feature expansion of a device due to the extension of the slave device, by variably controlling the access time of the slave device. SOLUTION: This device is provided with a microcomputer 101 and a salve device 102 or 103, connected to the bus of the microcomputer is provided with the microcomputer for ending the bus access according to an access response signal, in response to an external access and the slave device connected to the bus of the microcomputer which is not provided with any access response signal, in response to access from the microcomputer and a timer 105 arranged between the computer and the salve device to be stated with an access start signal from the microcomputer as a trigger. When a timer value, which counts up at the rising of a clock signal form the microcomputer 101, is compared with the set information of an external terminal A106 by a comparator 106, and when those values are made coincident, the bus access ending timing is decided, and an access response signal DTACK to the microcomputer is outputted.</p>
申请公布号 JP2002342267(A) 申请公布日期 2002.11.29
申请号 JP20010146525 申请日期 2001.05.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ASAI YUTAKA;FUKUDA MASAHIRO
分类号 G06F15/78;G06F13/42;(IPC1-7):G06F13/42 主分类号 G06F15/78
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