METHOD AND CIRCUIT FOR SELECTING AND OUTPUTTING CLOCK SIGNAL

摘要

PROBLEM TO BE SOLVED: To provide a method and a circuit for selecting and outputting a clock signal capable of properly selecting and outputting the clock signal with desired frequency either of high and low even when difference exists in inputted period of two or more clock signals with different frequencies. SOLUTION: This circuit is provided with counters 11a, 11b to count the number of clocks of two clock signals Sin1, Sin2 to be inputted respectively, buffers 12a, 12b, a selector 13 to switch the buffer 12a or 12b in which the clock signal Sin1 or Sin2 on the side where a counted value of the counter 11a, 11b reach a prescribed value N faster so as to output the clock signal Sin1 or Sin2 and a reset circuit 14 to reset all the counted values of the counters 11a, 11b when the counted value of the counter 11a or 11b reaches the prescribed value N.