发明名称 VERIFICATION SYSTEM FOR VERIFYING SYSTEM LSI OPERATION,ETC.
摘要 A multiplexing block multiplexes and outputs a plurality of electric signals transmitting through a bus wiring. A demodulation block demodulates the plurality of electric signals multiplexed and output from the multiplexing block. By referencing the plurality of electric signals demodulated by the demodulation block, operation of the system LSI (1) is analyzed. Thus, with a number of output terminals smaller than the number of electric signals to be verified, it is possible to extract and analyze the electric signals of the entire system LSI. That is, it is possible to verify the operation of the entire system LSI with a reasonable cost and a simple configuration.
申请公布号 WO02095432(A1) 申请公布日期 2002.11.28
申请号 WO2002JP04545 申请日期 2002.05.10
申请人 SONY COMPUTER ENTERTAINMENT INC.;HIRAOKA, DAISUKE 发明人 HIRAOKA, DAISUKE
分类号 G01R31/28;G01R31/317;G01R31/3181;G01R31/319;H01L21/822;H01L27/04;(IPC1-7):G01R31/318 主分类号 G01R31/28
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