发明名称 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
摘要 A memory array having at least two memory cells accessed for each row address to retain a sufficient electric charge to properly store "1" and "0" bits. For such a memory array both even and odd row decoders in the array are permanently enabled so that each row address the array receives causes the even row decoder to energize at least one even word line and the odd row decoder to energize at least one odd word line. As a result, at least two memory cells are accessed for each row address so that each "1" or "0" bit is stored as an electric charge in at least two memory cells. By grouping enough memory cells together in this manner to store each "1" and "0" bit, the grouped memory cells are able to retain a sufficient total electric charge as a group to properly store each bit even when individual memory cells in the group are unable to do so.
申请公布号 US2002176303(A1) 申请公布日期 2002.11.28
申请号 US20020189138 申请日期 2002.07.02
申请人 发明人 SHORE MICHAEL A.
分类号 G11C7/00;G11C7/10;G11C8/00;G11C11/408;G11C29/00;(IPC1-7):G11C7/00 主分类号 G11C7/00
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