发明名称 Method for low topography semiconductor device formation
摘要 A method for forming a planarized field effect transistor (FET) is disclosed. In an exemplary embodiment of the invention, the method includes defining an active semiconductor region upon a substrate, the active semiconductor region further comprising a pair of mesa regions therein. A source region is defined within a top surface of one of the pair of mesa regions, and a drain region is defined within a top surface of the other of the pair of mesa regions. Then, a gate material is deposited between the pair of mesa regions, and the gate material is planarized to form a gate. Thereby, a top surface of the gate is substantially planar with the source and drain regions.
申请公布号 US2002175369(A1) 申请公布日期 2002.11.28
申请号 US20010864033 申请日期 2001.05.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 COLAVITO DAVID B.;ROVEDO NIVO;NGUYEN PHUNG T.
分类号 H01L21/28;H01L21/336;H01L29/06;H01L29/10;H01L29/423;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L21/28
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