Method for sealing via sidewalls in porous low-k dielectric layers

摘要

A method for completing an integrated circuit in the horizontal surface of a semiconductor substrate having interconnecting metal lines, comprising the steps of forming a dielectric layer over a said substrate; etching a substantially vertical hole into said dielectric layer so that it exposes one of said metal lines; depositing a barrier layer over said structure including within said hole, said barrier layer operable to seal said dielectric sidewalls of said structure; selectively removing said barrier layer from the bottom of said hole, thereby exposing said metal line; and forming a copper interconnect structure in said structure, contacting said metal line.