| 摘要 |
PURPOSE: Disclosed is a semiconductor integrated circuit capable of operating at high speed and with low power consumption even when the size of MOS transistors is scaled down. CONSTITUTION: Polysilicon layers(130,131,132,133) are used as gates. MOS transistors(MC2,MP) hold a same n-well(101) which is connected to power(VCC) through an n+ diffusion layer(120) in common. MOS transistors(MN,MS2) also hold a p-substrate connected to VSS in common in a similar manner. It not only produces the effect, but also produces more advantageous layout area to connect the back gates of the MOS transistors to VCC and VSS as compared with connection of the same to the sources.
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