发明名称 BIT LINE PRECHARGE CIRCUIT
摘要 PURPOSE: A bit line precharge circuit is provided, which can reduce current consumption in a self-refresh mode by precharging a bit line/bit bar line after equalizing them. CONSTITUTION: According to a semiconductor memory device having a memory cell, a pair of bit lines(BL,/BL) connected to the memory cell and a sense amp amplifying data loaded on the bit line, the bit line precharge circuit comprises a level control part(420) including an equalization unit(MN5) and the first and the second precharge unit(MN3,MN4). The equalization unit is connected between the pair of bit lines and equalizes the pair of bit lines in response to an input of a bit line equalization signal. The first and the second precharge unit have channels connected in serial between the pair of bit lines and transmit a bit line precharge voltage(VBLP) to the bit lines in response to the input of the bit line precharge signal.
申请公布号 KR20020087268(A) 申请公布日期 2002.11.22
申请号 KR20010026370 申请日期 2001.05.15
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, JUN GI
分类号 G11C7/12;(IPC1-7):G11C7/12 主分类号 G11C7/12
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