发明名称 SYSTEM CONTROLLER AND SYSTEM CONTROLLING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a system controller and a system controlling method which stably and surely cancels resetting of a system, prevents initial malfunction of the system due to an unlocked abnormal clock, and starts the system operation normally. SOLUTION: A PLL means P1 goes into a lock state, and a clock signal (g) from the PLL means P1 is stabilized sufficiently for detecting the lock state by a lock detector 107. Then the reset state of a system under control with a reset signal (j) from a reset output unit 108 is released, to start the operation of various functional blocks of the system.
申请公布号 JP2002335156(A) 申请公布日期 2002.11.22
申请号 JP20010138023 申请日期 2001.05.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHINO MASAKI
分类号 G06F1/24;H03L7/08;H03L7/095 主分类号 G06F1/24
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