| 摘要 |
PROBLEM TO BE SOLVED: To output stabilized reset pulse. SOLUTION: In a power-on reset circuit, a capacitor C1 and a transistor M1 are connected, in series between a power supply voltage and a ground voltage; a transistor M2 and a capacitor C2 are connected in series between the power supply voltage and the ground voltage; an inverter IV is connected between the power supply voltage and the ground voltage; the gate of the transistor M1 is connected to a node of the capacitor C1 and the transistor M1 and the gate of the transistor M2; and a node of the transistor M2 and the capacitor C2 is connected to the inverter IV. Furthermore, a transistor M3 is connected in series between the transistor M1 and the capacitor C1, a divided voltage determined by the ratio of a plurality of resistors R1 and R2 is applied to the gate of the transistor M3, and the resistors R1 and R2 are connected in series between the power supply voltage and the ground voltage.
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