发明名称 MULTILAYER WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF
摘要 <p>PROBLEM TO BE SOLVED: To reduce deterioration in high frequency property of a multilayer wiring substrate. SOLUTION: N sheets of (N is an integer of 2 or more) wiring boards wherein a conductor wiring 2 is disposed on the surface of an insulating board 1 are laminated on a multilayer wiring board. The permittivity of Mth laminated wiring board (M is any integer from 2 to N) is small because a specified position of an insulating board is opened, resulting suppressing deterioration of high frequency property. In addition, the multilayer wiring board is small in signal delay compared with surface mounting by providing a chip function device 5 in an opening 4 of the Mth layer.</p>
申请公布号 JP2002335081(A) 申请公布日期 2002.11.22
申请号 JP20010138359 申请日期 2001.05.09
申请人 HITACHI CABLE LTD 发明人 ONDA MAMORU;OKABE NORIO;ISHIHARA TAKESHI
分类号 H05K3/46;H01L23/12;(IPC1-7):H05K3/46 主分类号 H05K3/46
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