发明名称 |
Supply noise reduction in memory device column selection |
摘要 |
Column select circuits having improved immunity to supply potential noise during sensing of the programmed state of a target memory cell are suited for use in low-voltage memory devices. Such column select circuits contain driver circuits having a filtered path and an unfiltered path for applying a supply potential to a gate of a pass transistor. The unfiltered path is utilized during a first sensing phase, such as during decoding or precharging of the bit lines, when transition speed of the pass transistors is desired. The filtered path is utilized at least during a second sensing phase while the sensing device is detecting the programmed state of the target memory cell. By reducing the noise of the supply potential using the filtered path, margins are improved on the sensing device and the sensing device is thus capable of operating at lower supply potentials.
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申请公布号 |
US2002172088(A1) |
申请公布日期 |
2002.11.21 |
申请号 |
US20010032375 |
申请日期 |
2001.12.21 |
申请人 |
IORIO ERCOLE DI;MAROTTA GIULIO G.;SANTIN GIOVANNI;VALI TOMMASO |
发明人 |
IORIO ERCOLE DI;MAROTTA GIULIO G.;SANTIN GIOVANNI;VALI TOMMASO |
分类号 |
G11C7/02;G11C7/10;G11C8/10;G11C16/08;(IPC1-7):G11C8/00 |
主分类号 |
G11C7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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