| 摘要 |
A method and apparatus for asynchronously controlling a DRAM array (240) in an SRAM environment is described. In one embodiment, this is a method of arbitrating between a refresh request and an access request. Furthermore, the access request may be either a read or a write request. Moreover, the refresh request may be generated by a refresh control circuit (210) within a circuit implementing the asynchronous control method. In an alternated embodiment, this an apparatus. The apparatus includes an arbitration ci rcuit block (230), which may receive a refresh request and an access request. Furthermore, the access request may come as a read request or a write request, which may be implemented as separate signals. Moreover, the apparatus may include a refresh circuit block which may generate refresh control signals and the refresh request signal for the arbitration circuit.
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