发明名称 Method for manufacturing components on an SOI wafer
摘要 Method for manufacturing components on an SOI wafer. In the previously known methods, the differing electrical requirements of the MOS and bipolar transistors in respect of the thickness of the silicon layer lying on the insulating intermediate layer hinder the integration of the different types of components on one wafer. According to the new method, the requirements regarding the thickness, in particular those for the bipolar transistors, are substantially reduced by implanting buried silicided areas because the previous "buried-layer" is replaced by a thin, low ohmic silicide layer. Furthermore, the HF characteristics of the MOS-transistors can be improved by the buried silicide areas.
申请公布号 US2002173086(A1) 申请公布日期 2002.11.21
申请号 US20020145172 申请日期 2002.05.13
申请人 ATMEL GERMANY GMBH 发明人 DIETRICH HARRY;DUDEK VOLKER;SCHUEPPEN ANDREAS
分类号 H01L21/84;H01L27/12;(IPC1-7):H01L21/00;H01L21/30;H01L21/331;H01L21/336;H01L21/46;H01L21/822 主分类号 H01L21/84
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