发明名称 |
Producing second signal with clock based on second clock from first signal with first clock involves sampling first signal using second clock, phase shifted clock to detect defined logical state |
摘要 |
The method involves sampling the first signal using the second clock to determine whether the first signal has a defined logical state, sampling the first signal using with a phase shifted clock to determine it has the defined state and if the state is detected in at least one of the steps, producing the second signal based on the second clock staring with the next cycle of the second clock. AN Independent claim is also included for the following: an arrangement for producing a second signal with a clock based on a second clock from a first signal with a first clock.
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申请公布号 |
DE10122702(A1) |
申请公布日期 |
2002.11.21 |
申请号 |
DE20011022702 |
申请日期 |
2001.05.10 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
SCHROEGMEIER, PETER;MARX, THILO |
分类号 |
H03K5/135;H04L7/00;(IPC1-7):H03K5/135;G06F1/06 |
主分类号 |
H03K5/135 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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