| 摘要 |
Test circuit for testing a circuit (3) which is clocked with a high-frequency clock signal and needs to be tested, where the test circuit (1) has: (a) a frequency multiplication circuit (8) which multiplies the clock frequency of a clock signal (CLKTest), output by a tester (2), for producing the high-frequency clock signal (CLKDUT) by a frequency multiplication factor (k); (b) a control signal input bus (14) for receiving various external control signals (RAS, CAS, WE, CS) for the circuit (3) which is to be tested from the tester (2), where each control signal (RAS, CAS, WE, CS) is received in parallel via a plurality of control lines whose number is respectively equal to the frequency multiplication factor (k); (c) a parallel/serial converter (17) which is clocked with the high-frequency clock signal, is connected to the control signal input bus (14) and outputs each control signal to the circuit (3) to be tested via a control line of a control signal output bus (23, 25); and (d) a decoder circuit (19) which is clocked with the high-frequency clock signal and produces internal control signals (R/W) for the test circuit (1) on the basis of the control signals (CAS, RAS, WE, CS) which are on the control signal input bus (14), so that additional external control lines are not needed.
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