发明名称 Method for forming a semiconductor device having elevated source and drain regions
摘要 Epitaxial silicon is grown to form elevated source/drain extensions for transistors on silicon-on-insulator (SOI) substrates. An offset linear layer is formed between the gate and the epitaxial silicon to prevent shorting. In one embodiment, the offset linear layer is a nitride and in another embodiment it is an oxide. The resulting structure decreases extension resistance and improves the scalability of SOI transistors by increasing the thickness of silicon underneath the source and drain regions, while keeping the silicon underneath the gate thin. This allows for the reduction in gate length without decreasing the functionality of the transistor.
申请公布号 US2002171107(A1) 申请公布日期 2002.11.21
申请号 US20010861812 申请日期 2001.05.21
申请人 CHENG BAOHONG;LII YEONG-JYH T. 发明人 CHENG BAOHONG;LII YEONG-JYH T.
分类号 H01L21/336;H01L29/78;(IPC1-7):H01L21/00 主分类号 H01L21/336
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