Phase detector circuit for phase-regulating loop uses Exclusive-OR gates connected in circuit with integrators providing integrating loop filter

摘要

The phase detector circuit uses 2 Exclusive-OR gates with common load resistances (R1,R2) or current sources, acting as a phase comparator and an integrating loop filter for integrating the difference between their output signals, for controlling generation of clock signals. The output signals of the Exclusive-OR gates are integrated via respective integrators (X1,X2) connected in parallel with the load resistances or current sources, the loop filter output voltage obtained from the integrator voltages.