发明名称
摘要 <p>PURPOSE: To obtain a television receiver of simple constitution by processing a signal with a specific clock rate. CONSTITUTION: A luminance signal is separated to a high-pass component and a low-pass component by a separation filter, and the high-pass component is supplied to a inter-luminance high-pass component frame interpolation circuit 30 via a nonlinear processing circuit. A horizontal motion vector and a vertical motion vector are supplied from a control decode circuit to the inter-luminance high-pass component frame interpolation circuit 30. The inter-high-pass component frame interpolation circuit 30 controls frame memory 60 considering only the vertical motion vector, and corrects by shifting a luminance high-pass component from the frame memory 60 by a shift quantity control circuit 76, etc., corresponding to the horizontal motion vector. An interpolated component is obtained by mixing output from the shift quantity control circuit 76 with that from a moving image processing filter 58, and the inter-frame interpolation of the component to the luminance high-pass component of the present frame from a delay circuit 56 is performed by a selector 88. Horizontal vector correction and correction between frames are performed by interpolation with clock rate 16.2MHz.</p>
申请公布号 JP3349285(B2) 申请公布日期 2002.11.20
申请号 JP19950016580 申请日期 1995.02.03
申请人 发明人
分类号 H04N11/04;H04N9/78;H04N11/08;H04N11/24;(IPC1-7):H04N11/08 主分类号 H04N11/04
代理机构 代理人
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