| 发明名称 |
EFFICIENT DIGITAL QUADRATURE DEMODULATOR |
| 摘要 |
<p>A digital quadrature demodulator for an intermediate frequency (IF) input signal with an analog-to-digital (A/D) converter having a sampling frequency fs and an input to which the IF input signal is applied where the IF input signal has a bandwith B<fs/4 centered about a frequency of fs/4. The demodulator includes an arrangement to direct even numbered output signals from the A/D converter to an inphase channel and odd numbered output signals from the A/D converter to a quadrature channel where each channel contains a highpass filter and the demodulator includes circuits to decimate by 4 signals of the channels to generate, together with the filters, a quadrature output signal Q(nT) at an output of the quadrature channel and an inphase output signal I(nT) at an output of the inphase channel. The quadrature highpass filter in the quadrature channel has an optimized transform architecture in which the filter coefficients hk correspond to those of a lowpass prototype filter with N=2k+1 coefficients after multiplication by sin(k.pi./2) where k identifies a particular stage of the filter. The inphase highpass filter in the inphase channel has an optimized transform architecture in which the filter coefficients hk correspond to those of a lowpass prototype filter after multiplication by cos(k.pi./2).Employing optimized filter architectures and simplified filter coefficients obtained with a new design procedure provides a practical quadrature demodulator design which can be economically implemented in hardware.</p> |
| 申请公布号 |
CA2150389(C) |
申请公布日期 |
2002.11.19 |
| 申请号 |
CA19952150389 |
申请日期 |
1995.05.29 |
| 申请人 |
MINISTER OF NATIONAL DEFENCE |
发明人 |
INKOL, ROBERT J. |
| 分类号 |
H03D1/00;H03D3/00;(IPC1-7):H03D1/00 |
主分类号 |
H03D1/00 |
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