发明名称 Reduced component frequency plan architecture for dual band transceiver
摘要 A transceiver (100) includes a synthesizer (400, 500, 600) which includes a single phase locked loop (406) for generating both a transmit offset signal and a receive second local oscillator (LO) signal for use by the transceiver. A single voltage controlled oscillator 424 provides oscillator signals for both modes. A prescaler (428) in the phase locked loop keeps the tuning distance of the VCO small. The resulting transceiver and radio including the transceiver has reduced parts count and current drain and is smaller in size then previous equipment with the same functionality.
申请公布号 US6484014(B1) 申请公布日期 2002.11.19
申请号 US19990273935 申请日期 1999.03.22
申请人 ERICSSON INC. 发明人 KOSZARSKY CHRISTOPHER
分类号 H04B1/40;(IPC1-7):H04B1/38 主分类号 H04B1/40
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