发明名称 |
Synchronous semiconductor memory device and method for operating same |
摘要 |
Disclosed is a semiconductor memory device comprising a pipeline structure having a sense amplifier responsive to a first enable signal; a data register responsive to a second enable signal for latching an output of said sense amplifier between said sense amplifier and a common data line; and a monitoring part to monitor said first and second enable signals and adapted to prevent overlapping between an enabling interval of said first enable signal and said second enable signal.
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申请公布号 |
US6483770(B2) |
申请公布日期 |
2002.11.19 |
申请号 |
US20010849289 |
申请日期 |
2001.05.04 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
NOH YONG-HWAN;SOHN KYO-MIN |
分类号 |
G11C7/10;(IPC1-7):G11C8/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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