发明名称 Method for fabricating an electrostatic discharge device in a dual gate oxide process
摘要 A method of fabricating an HV-I/O ESD MOS device comprising the following steps. A structure having a first device region, a second device region and an HV-I/O ESD MOS device region is provided. A gate is formed over an oxide layer within the first device region. A gate is formed over an oxide layer within the second device region. A gate is formed over an oxide layer within the HV-I/O ESD MOS device region. The first device gate oxide layer is thinner than the second device gate oxide layer and the HV-I/O ESD MOS device gate oxide layer. The gate and oxide layers within each region have exposed side walls. An LV-LDD mask is formed over the gate and the structure within the second device region. An LV-LDD implant is performed into the structure adjacent the first device gate and the HV-I/O ESD MOS device gate to form first device LV-LDD implants and HV-I/O ESD MOS device LV-LDD implants. The LV-LDD mask is removed. An HV-LDD mask is formed over the gate and the structure within the first device region. An HV-LDD implant is performed into the structure adjacent the second device gate and the HV-I/O ESD MOS device gate to form second device HV-LDD implants and HV-I/O ESD MOS device HV-LDD implants. The HV-LDD mask is removed. Spacers are formed over the respective exposed side walls of the gate and oxide layers within each respective region to complete fabrication of a first device, a second device and the HV-I/O ESD MOS device. In an alternate embodiment, an I/O LV device may also be simultaneously formed within an I/O LV device region.
申请公布号 US6482703(B1) 申请公布日期 2002.11.19
申请号 US20010965322 申请日期 2001.09.28
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 YU TA-LEE
分类号 H01L21/8234;H01L27/02;(IPC1-7):H01L21/336;H01L21/823 主分类号 H01L21/8234
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