发明名称 Multilevel cell memory architecture
摘要 A multilevel cell memory may use an architecture in which bits from different words are stored in the same multilevel memory cell. This may improve access time because it is not necessary to sense both cells before the word can be outputted. Therefore, the access time may be improved by removing a serial element from the access chain.
申请公布号 US6483743(B1) 申请公布日期 2002.11.19
申请号 US20010883803 申请日期 2001.06.18
申请人 INTEL CORPORATION 发明人 TALREJA SANJAY S.
分类号 G11C11/56;(IPC1-7):G11C16/04 主分类号 G11C11/56
代理机构 代理人
主权项
地址