发明名称 Memory redundancy techniques
摘要 A redundant memory system includes an address bus, a random access memory, a content addressable memory, a replacement memory, and a data bus. The random access memory includes a number of addressable memory locations each accessed by a different one of a number of addresses provided by the address bus. The content addressable memory stores a number of defective location addresses each corresponding to a defective addressable memory location of the random access memory and responds to a match between an address provided by the address bus and one of the defective location addresses to activate one of a number of match lines. The replacement memory is coupled to the content addressable memory by the match lines and includes a number of replacement memory locations each accessed by activating a different one of the lines. The data bus receives addressable memory information from the random access memory when addressed by one of the addresses other than one of the defective location addresses and receives replacement information from the replacement memory in response to activate a respective match line. Defective information in the addressable memory is accessed in response to addressing by one of the defective location addresses, but output of the defective information is prevented during a read operation by the match line activation.
申请公布号 US6484271(B1) 申请公布日期 2002.11.19
申请号 US19990397576 申请日期 1999.09.16
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 GRAY KENNETH S.
分类号 G11C11/413;G06F12/16;G11C29/00;G11C29/04;G11C29/12;(IPC1-7):H02H3/05 主分类号 G11C11/413
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