Semiconductor device fabrication

摘要

1,145,879. Semi-conductor devices. RADIO CORPORATION OF AMERICA. 16 May, 1966 [28 May, 1965], No. 21727/66. Heading H1K. In an insulated gate FET, the conductivity of that part of the channel not covered by the gate electrode is enhanced by heating in a suitable ambient after applying the gate electrode. The device is produced by heating a P-type silicon wafer (10) in steam to produce silicon oxide layers (14, 15), photomasking and etching to produce windows (17, 18) and heating in phosphorus pentoxide vapour to produce N- type source and drain regions (19, 21), Figs. 2 to 4 (not shown). The remaining oxide layers are removed by etching in hydrofluoric acid and the wafer is re-oxidized in dry oxygen. The oxide layer (24) on the upper surface is photomasked and the wafer etched to remove the oxide layer (25) on the lower surface and to form windows (27, 28) in the upper oxide layer (24) over the source and drain regions (19, 21), Figs. 5 to 7 (not shown). The wafer is then heated in a reducing ambient such as hydrogen or a mixture of hydrogen and argon or nitrogen, forming gas (10 : 90 hydrogen : nitrogen) being mentioned, to form an inversion layer (30) under the remaining parts of the oxide layer, Fig. 8 (not shown). A metal layer (40) is deposited over the surface of the wafer and is masked and etched to produce contacts (41, 43) on the exposed parts of the source and drain regions (19, 21) and a gate electrode (42) on the oxide layer covering the channel (30), Figs. 9 and 10 (not shown). The metal layer (40) may comprise a layer of chromium on which is vapour deposited a layer of gold or silver. As shown, Fig. 11, the gate electrode 42 is offset towards the source region 19 and the conductivity of the part 33 of the channel region 30 nearest to the drain region 21 is increased by heating the wafer in an atmosphere of hydrogen or forming gas, the gate electrode 42 acting as a mask. Leads are applied to the electrodes 41, 42, 43 by soldering or thermocompression bonding. A plurality of devices may be produced in the wafer which is then diced, and the individual devices are mounted on metallic headers and encapsulated.