发明名称 |
Reducing internal bus speed in a bus system without reducing readout rate |
摘要 |
An improved bus system having input ports and output ports for transporting data is described. The bus system includes bus lines, switching elements, and a sequencing element. The bus lines channel data from the input ports to the output ports. The switching elements are configured to place data from the input ports onto the bus lines. Each of the switching elements enable one of a group of data to be placed on each of the bus lines simultaneously. The sequencing element selects a predetermined number of the group of data on the bus lines and sequentially directs the selected number of data to the output ports at different points in time.
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申请公布号 |
US6480921(B1) |
申请公布日期 |
2002.11.12 |
申请号 |
US19990359068 |
申请日期 |
1999.07.21 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
MANSOORIAN BARMAK;YEE SCOTT;PANICACCI ROGER |
分类号 |
G06F13/00;G06F13/42;H04L12/50;H04Q11/00;(IPC1-7):G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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