| 摘要 |
PURPOSE: A serial booth multiplier using a multiplexer is provided to increase a speed and to reduce a size in a modified booth multiplier being used frequently for a high speed multiplication for a DSP or a coprocessor. CONSTITUTION: A multiplicand generating unit(23) executes a 2's complement of a multiplicand 'Y', makes '-Y', moves the '-Y' to an input terminal one field by one field, makes "-2Y", moves the 'Y' one field by one field, and makes "2Y". A booth encoder(22) receives a multiplicand 'X' 3-bit through the first register(21) being synchronized by the first clock signal from an exterior, and generates a 2's complement, a shift, and a zero signal. A multiplexer(24) selects and outputs one out of five values(Y,2Y,0,-Y,-2Y) from the multiplicand generating unit(23) by the 2's complement and shift signal from the booth encoder(22). An AND gate(25) ANDs the zero signal from the booth encoder(22) to the output value selected by the multiplexer(24) and outputs the result value. An add array(26) receives an output signal from the AND gate(25) and generates a Sum and a Carry. The second and third registers(27,28) synchronize the Sum and Carry with the first clock and output to the add array(26). The fourth and fifth registers(29,30) receive a value from the second and third registers(27,28) and synchronize/output the value with the second clock. A 2-input adder(31) outputs the value received through the fourth and fifth registers(29,30) as the final multiplication value.
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