发明名称 |
ROUTE SEARCH METHOD, TIMING ANALYSIS METHOD, WAVE ANALYSIS METHOD, SIMULATION APPARATUS FOR ELECTRONIC CIRCUIT AND PROGRAM |
摘要 |
PROBLEM TO BE SOLVED: To provide a technology for constant and high-precision performance of a simulation for an operation verification of a designed electronic circuit. SOLUTION: Each route search means 14-16 equipped by a route search apparatus 12 searches routes while distinguishing the routes targeted for a search or selecting one route among more than one route (or combining the routes) with referring to a predetermined condition group, respectively. Accordingly, the number to be extracted is suppressed at a minimum without eliminating any route to be considered. A simulation means 13 performs the simulation for a timing analysis, a pulse width check and the like by using a result of route searches through the means 14-16.
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申请公布号 |
JP2002324099(A) |
申请公布日期 |
2002.11.08 |
申请号 |
JP20010128969 |
申请日期 |
2001.04.26 |
申请人 |
FUJITSU LTD |
发明人 |
IKEDA HIROSHI;BIZEN NAOMI |
分类号 |
G01R31/28;G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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地址 |
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