发明名称 |
SIGNAL TRANSMISSION SYSTEM BETWEEN COMPONENTS SUCH AS MEMORIES |
摘要 |
PROBLEM TO BE SOLVED: To provide a high-speed low amplitude bus by preventing repetitive reflections in a branch wiring. SOLUTION: A signal transmission circuit comprising one unit or more each having a sending circuit and a transmission line to deliver a signal generated by the transmission circuit; one unit or more each having a receiving circuit and a transmission line to receive the signal received by the receiving circuit and; a transmission line for transmission among the units is connected to power supplies at one or more position of the inter-unit transmission line via a resistor, and an element with a resistance nearly equal to a value resulting from subtracting a half of the effective impedance of the inter-unit transmission line from the impedance of the in-unit transmission line is placed between the in-unit transmission lines having the sending circuit and the inter-unit transmission line.
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申请公布号 |
JP2002325107(A) |
申请公布日期 |
2002.11.08 |
申请号 |
JP20020005468 |
申请日期 |
2002.01.15 |
申请人 |
HITACHI LTD |
发明人 |
TAKEKUMA SHUNJI;KURIHARA RYOICHI;YAMAGIWA AKIRA |
分类号 |
G06F3/00;G06F12/00;G06F13/16;H01P1/10;H01P5/12;H03K19/0175;H04L12/40;H04L25/02;(IPC1-7):H04L25/02 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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