| 摘要 |
PROBLEM TO BE SOLVED: To provide a PLL circuit whose lockup time is quick, whose power consumption is small, and whose switching timing is proper. SOLUTION: This PLL circuit is provided with a generating means 2 for generating a plurality of reference signals, a first variable frequency divider 9 and a second variable frequency divider 15 for frequency-dividing the output signal of a voltage control oscillator 11, and for outputting each feedback signal, a first phase comparator 7 and a second phase comparator 8 for phase- comparing each feedback signal with each reference signal, and a generating part 16 for preventing the output of the second phase comparator 8 from being transmitted to the post stage according to the output signal. |
